发明名称 METHOD AND SYSTEM FOR A GAN VERTICAL JFET WITH SELF-ALIGNED GATE METALLIZATION
摘要 A semiconductor device includes a III-nitride substrate and a first III-nitride epitaxial layer coupled to the III-nitride substrate and comprising a drift region, a channel region, and an extension region. The channel region is separated from the III-nitride substrate by the drift region. The channel region is characterized by a first width. The extension region is separated from the drift region by the channel region. The extension region is characterized by a second width less than the first width. The semiconductor device also includes a second III-nitride epitaxial layer coupled to a top surface of the extension region, a III-nitride gate structure coupled to a sidewall of the channel region and laterally self-aligned with respect to the extension region, and a gate metal structure in electrical contact with the III-nitride gate structure and laterally self-aligned with respect to the extension region.
申请公布号 US2013299873(A1) 申请公布日期 2013.11.14
申请号 US201213468325 申请日期 2012.05.10
申请人 DISNEY DONALD R.;BROWN RICHARD J.;NIE HUI;AVOGY, INC. 发明人 DISNEY DONALD R.;BROWN RICHARD J.;NIE HUI
分类号 H01L29/80;H01L21/335 主分类号 H01L29/80
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