发明名称 Nonplanar device with stress incorporation layer and method of fabrication
摘要 <p>A semiconductor device comprising a semiconductor body having a top surface and laterally opposite sidewalls is formed on an insulating substrate. A gate dielectric layer is formed on the top surface of the semiconductor body and on the laterally opposite sidewalls of the semiconductor body. A gate electrode is formed on the gate dielectric on the top surface of the semiconductor body and is formed adjacent to the gate dielectric on the laterally opposite sidewalls of the semiconductor body. A thin film is then formed adjacent to the semiconductor body wherein the thin film produces a stress in the semiconductor body.</p>
申请公布号 EP2472587(B1) 申请公布日期 2013.11.13
申请号 EP20120160100 申请日期 2003.12.12
申请人 INTEL CORPORATION 发明人 HARELAND, SCOTT;CHAU, ROBERT;DOYLE, BRIAN;DATTA, SUMAN;JIN, BEEN-YIH
分类号 H01L29/10;H01L21/336;H01L29/423;H01L29/66;H01L29/76;H01L29/78;H01L29/786 主分类号 H01L29/10
代理机构 代理人
主权项
地址