发明名称 |
Method for manufacturing semiconductor device, semiconductor chip, and semiconductor wafer |
摘要 |
A semiconductor wafer having a plurality of interconnect layers, includes a plurality of chip-composing portions, a dicing region separating the chip-composing portions from each other, and a plurality of inter-chip interconnects formed in the dicing region and electrically connecting adjacent ones of the chip-composing portions, wherein each of the inter-chip interconnects has a width of an intermediate portion narrower than widths of connection end portions connected to the adjacent ones of the chip-composing portions.
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申请公布号 |
US8581368(B2) |
申请公布日期 |
2013.11.12 |
申请号 |
US201213438738 |
申请日期 |
2012.04.03 |
申请人 |
UCHIDA SHINICHI;KAWASHIMA YOSHITSUGU;ISE HIROSHI;RENESAS ELECTRONICS CORPORATION |
发明人 |
UCHIDA SHINICHI;KAWASHIMA YOSHITSUGU;ISE HIROSHI |
分类号 |
H01L23/544 |
主分类号 |
H01L23/544 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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