| 摘要 |
A serial bit processor is disclosed that configures a timer/counter module to determine a number of data bits to be decoded from a serial bit stream. In some implementations, a serial peripheral is coupled to a timer/counter module. The serial peripheral sends a restart command to reload an internal count register of the timer/counter module with a pre-defined value. The serial peripheral then sends count commands that cause the timer/counter to decrement (or increment) by one each time a count command is received. When the count reaches zero, a compare match command is generated and sent to the serial peripheral where it is used to resume or complete the decoding of data bits from the serial bit stream. In some implementations, a serial peripheral is included in a microcontroller that has an event system. The event system is used to communicate commands between peripherals. |
