发明名称 BIT ERROR GENERATION SYSTEM FOR OPTICAL NETWORKS
摘要 A bit error generating device includes a light source, an input device, and a control processor. The control processor includes logic configured to: receive protocol or bitrate information regarding a live traffic signal via the input device; determine bit error simulation signal parameters based on the received protocol or bitrate information; configure the light source to generate the bit error simulation signal based on the bit error simulation signal parameters; and instruct the light source to inject the bit error simulation signal into an optical fiber carrying the live traffic signal.
申请公布号 US2013294769(A1) 申请公布日期 2013.11.07
申请号 US201313933199 申请日期 2013.07.02
申请人 VERIZON PATENT AND LICENSING INC. 发明人 KOTRLA SCOTT R.;TURLINGTON MATTHEW W.;BENCHECK MICHAEL U.;XIA TIEJUN J.
分类号 H04B10/077 主分类号 H04B10/077
代理机构 代理人
主权项
地址