发明名称 |
MULTI-CORE PROCESSOR SYSTEM, ALLOCATION PROGRAM, CONTROL PROGRAM, ALLOCATION METHOD AND CONTROL METHOD |
摘要 |
A CPU #0 detects an assignment instruction for a process 1. The CPU #0 acquires a remaining time obtained by subtracting a CP of a handler B (processing time of handler A) from a period (Dt of handler B) that is from the time when an event of the handler B occurs, which is interrupt processing assigned to a CPU #1. The CPU #0 judges if the acquired remaining time is greater than or equal to a processing time (CP of process 1) defined to limit an interrupt in the process. In other words, when the process 1 is assigned to the CPU #1, even if an event of the handler B occurs during execution of the process 1, the CPU #0 judges whether the Dt of the handler B can be met. When the event of the handler B occurs during execution of the process 1, the CPU #0 judges that the Dt of the handler B can be met and therefore, the CPU #0 assigns the process 1 to the CPU #1. |
申请公布号 |
EP2600245(A4) |
申请公布日期 |
2013.11.06 |
申请号 |
EP20100855322 |
申请日期 |
2010.07.30 |
申请人 |
FUJITSU LIMITED |
发明人 |
YAMASHITA, KOICHIRO;SUZUKI, TAKAHISA;YAMAUCHI, HIROMASA;KURIHARA, KOJI |
分类号 |
G06F9/48;G06F1/08;G06F1/32;G06F9/50 |
主分类号 |
G06F9/48 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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