Semiconductor device with a gate stack

摘要

The present invention relates to a semiconductor device comprising a gate stack structure (1), the gate stack structure (1) comprising: at least a substrate (10) comprising a semiconductor that is substantially doped with n-type carriers; at least a passivation layer (12) comprising silicon formed on the substrate (10), and at least an insulator layer (13) formed on the passivation layer (12), wherein the gate stack structure (1) further comprises: at least an interlayer dopant provided between the substrate (10) and the passivation layer (12), the interlayer dopant comprising an n-type dopant (11) that is selected to facilitate control of a threshold voltage applicable to the gate stack structure (1) when the semiconductor device is in use.