发明名称 |
Enabling storage of active state in internal storage of processor rather than in SMRAM upon entry to system management mode |
摘要 |
In one embodiment, the present invention includes a processor that has an on-die storage such as a static random access memory to store an architectural state of one or more threads that are swapped out of architectural state storage of the processor on entry to a system management mode (SMM). In this way communication of this state information to a system management memory can be avoided, reducing latency associated with entry into SMM. Embodiments may also enable the processor to update a status of executing agents that are either in a long instruction flow or in a system management interrupt (SMI) blocked state, in order to provide an indication to agents inside the SMM. Other embodiments are described and claimed.
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申请公布号 |
US8578138(B2) |
申请公布日期 |
2013.11.05 |
申请号 |
US20090550737 |
申请日期 |
2009.08.31 |
申请人 |
NATU MAHESH S.;RANGARAJAN THANUNATHAN;DOSHI GAUTAM B.;DATTA SHAMMANNA M.;GANESAN BASKARAN;KUMAR MOHAN J.;PARTHASARATHY RAJESH S.;BINNS FRANK;MURTHY RAJESH NAGARAJA;SWANSON ROBERT C.;INTEL CORPORATION |
发明人 |
NATU MAHESH S.;RANGARAJAN THANUNATHAN;DOSHI GAUTAM B.;DATTA SHAMMANNA M.;GANESAN BASKARAN;KUMAR MOHAN J.;PARTHASARATHY RAJESH S.;BINNS FRANK;MURTHY RAJESH NAGARAJA;SWANSON ROBERT C. |
分类号 |
G06F9/48 |
主分类号 |
G06F9/48 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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