发明名称 Asymmetric MIM capacitor for DRAM devices
摘要 A bilayer second electrode for a MIM DRAM capacitor is formed wherein the layer of the electrode that is in contact with the dielectric layer (i.e. bottom layer) has a composition that is resistant to oxidation during subsequent anneal steps and have rutile templating capability. Examples include SnO2 and RuO2. The capacitor stack including the bottom layer is subjected to a PMA treatment to reduce the oxygen vacancies in the dielectric layer and reduce the interface states at the dielectric/second electrode interface. The other component of the bilayer (i.e. top layer) is a high work function, high conductivity metal or conductive metal compound.
申请公布号 US8575671(B2) 申请公布日期 2013.11.05
申请号 US201213692460 申请日期 2012.12.03
申请人 INTERMOLECULAR, INC.;ELPIDA MEMORY, INC. 发明人 CHEN HANHONG;ODE HIROYUKI
分类号 H01L27/108;H01L29/94 主分类号 H01L27/108
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