发明名称 Pattern-split decomposition strategy for double-patterned lithography process
摘要 An integrated circuit may be formed by a process of forming a first interconnect pattern in a plurality of parallel route tracks, and forming a second interconnect pattern in the plurality of parallel route tracks. The first interconnect pattern includes a first lead pattern which extends to a first point in an instance of the first plurality of parallel route tracks, and the second interconnect pattern includes a second lead pattern which extends to a second point in the same instance of the plurality of parallel route tracks, such that the second point is laterally separated from the first point by a distance one to one and one-half times a space between adjacent parallel lead patterns in the plurality of parallel route tracks. A metal interconnect formation process is performed which forms metal interconnect lines in an interconnect level defined by the first interconnect pattern and the second interconnect pattern.
申请公布号 US8575020(B2) 申请公布日期 2013.11.05
申请号 US201213410188 申请日期 2012.03.01
申请人 BLATCHFORD JAMES WALTER;TEXAS INSTRUMENTS INCORPORATED 发明人 BLATCHFORD JAMES WALTER
分类号 H01L21/28;H01L21/4763 主分类号 H01L21/28
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