发明名称 PUERTA LOGICA DIFERENCIAL DE N ENTRADAS.
摘要 The invention relates to a differential logic gate having n inputs to be used with the LVDS differential standard in which 2n zero bias Schottky diodes and comparators are used. Depending on the connections between said diodes and the comparators, and between the outputs of the comparators, any type of logic gate can be created.
申请公布号 ES2392085(B1) 申请公布日期 2013.11.04
申请号 ES20110000287 申请日期 2011.03.14
申请人 UNIVERSIDAD COMPLUTENSE DE MADRID 发明人 TEJEDOR ALVAREZ, LUIS ANGEL
分类号 H03K19/0956;H03K19/20 主分类号 H03K19/0956
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