发明名称 WAFER PROCESSING LAMINATE, WAFER PROCESSING MEMBER, TEMPORARY BONDING ARRANGEMENT, AND THIN WAFER MANUFACTURING METHOD
摘要 <p>The present invention relates to a wafer processing laminate which is formed by forming a temporary bonding layer (2) on a supporter (3), forming a circuit on the surface of the temporary bonding layer (2), and laminating a wafer (1) to process the rear thereof and provides the wafer processing laminate which includes the temporary bonding layer (2) with a three-layered structure which is composed of a first temporary bonding layer which is composed of a thermoplastic siloxane bond-free polymer layer (A) which is detachably bonded on the surface of the wafer, a second temporary bonding layer which is composed of a thermoplastic siloxane polymer layer (B) which is detachably bonded on the supporter, and a third temporary bonding layer which is composed of a thermoplastic modified siloxane polymer layer (C) which is detachably bonded in contact with the (B) layer. The temporary bonding layer according to the present invention is applied to a wide semiconductor film forming process by high heat resistance. A bonding layer with high film thickness uniformity is formed on the wafer with a step. A thin wafer with the high film thickness uniformity is obtained.</p>
申请公布号 KR20130119883(A) 申请公布日期 2013.11.01
申请号 KR20130045440 申请日期 2013.04.24
申请人 SHIN-ETSU CHEMICAL CO., LTD. 发明人 KATO HIDETO;SUGO MICHIHIRO;TAGAMI SHOHEI;YASUDA HIROYUKI
分类号 H01L21/304;C09J201/00 主分类号 H01L21/304
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