SYSTEM AND METHOD FOR AUTO-CALIBRATION OF INTEGRATED CIRCUIT CHIPS USING PLL AT WAFER LEVEL

摘要

PURPOSE: A method and a system for auto-calibration of integrated circuit (IC) chips using phase locked loop at a wafer level are provided to quickly calibrate the IC chip, thereby reducing costs. CONSTITUTION: An analog part (250) comprises a voltage multiplying part (251) and an operating frequency generator (252). A digital part (260) comprises a frequency control part (261). A memory part (270) p comprises a user memory (271). The voltage multiplying part supplies a direct current (DC) to a tag chip (200) and distributes a DC supplied through an external power line (232) to each component of the tag chip. The operating frequency generator generates an operating frequency necessary for the operation of the tag chip. The generated operating frequency is transmitted through a frequency measurement line (233) to a correction controller. The frequency control part is connected to a correction bus (234) to receive a control signal for the correction of the operating frequency from the correction controller. [Reference numerals] (210) Buffer; (250) Analog part; (251) Voltage multiplying part; (252) Operating frequency generator; (260) Digital part; (261) Frequency control part; (270) Memory part; (271) User memory