In one aspect, a first charge pump has serially arranged charge pump stages. Inter-stage nodes between adjacent stages are pumped by a second charge pump. In another aspect, timing of the charge pump stages is controlled by at a command clock signal. The command clock signal and command data are communicated between a integrated circuit with the charge pump and an external circuit.
申请公布号
US2013285737(A1)
申请公布日期
2013.10.31
申请号
US201213460112
申请日期
2012.04.30
申请人
LIN YUNG FENG;HUANG CHUN-JEN;SHIAU TZENG-HUEI;HUNG CHUN-HSIUNG;WU CAIYUN;WANG QIFANG;MACRONIX INTERNATIONAL CO., LTD.
发明人
LIN YUNG FENG;HUANG CHUN-JEN;SHIAU TZENG-HUEI;HUNG CHUN-HSIUNG;WU CAIYUN;WANG QIFANG