| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor storage device capable of reducing erroneous writing.SOLUTION: The semiconductor storage device according to the embodiment comprises: a memory cell array 10 including a plurality of memory cell columns in which current paths of a plurality of memory cells MC are connected in series; a voltage generating circuit 7; and a control circuit 4. In data writing operation of the memory cell, the control circuit 4 steps up, in a stepwise manner, a first intermediate voltage VPSS applied to a first non-selected word line in application of a write voltage to a selection word line, and voltage-shifts a second intermediate voltage VPASS1 applied to a second non-selected word line adjacent to at least one of the selection word lines, to a voltage larger and higher than the magnitude of the stepping up, on the way of applying the write voltage to the selection word line. |
