发明名称 METHOD FOR FORMING IMPURITY REGION OF VERTICAL TRANSISTOR AND METHOD FOR FABRICATING VERTICAL TRANSISTOR USING THE SAME
摘要 A method for forming an impurity region of a vertical transistor includes forming an impurity ion junction region within a semiconductor substrate, and forming a trench by etching the semiconductor substrate in which the impurity ion junction region is formed. The etching process is performed to remove a portion of the impurity ion junction region, so that a remaining portion of the impurity ion junction region is exposed to a lower side wall of the trench to serve as a buried bit line junction region.
申请公布号 US2013288442(A1) 申请公布日期 2013.10.31
申请号 US201313926345 申请日期 2013.06.25
申请人 SK HYNIX INC. 发明人 EUN YONG SEOK;KIM TAE KYUN;ROUH KYONG BONG;PARK EUN SHIL
分类号 H01L29/66 主分类号 H01L29/66
代理机构 代理人
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