发明名称 SEMICONDUCTOR MEMORY APPARATUS
摘要 According to one embodiment, a semiconductor memory apparatus includes an array, a source, a bit line, a sense, and current circuit. The array includes a NAND string. The NAND string includes memory cell. The sense includes a first transistor. One end of transistor is connected to a first node, and other end of the transistor is connected to a second. The first node is used for reading the data held by the memory cell. An internal voltage is smaller than the source voltage. The current circuit outputs a first voltage to a gate of the transistor, and the first voltage is smaller than the internal voltage. The transistor limits a first current from the source to the sense based on a threshold voltage of the memory cell to be read.
申请公布号 US2013286738(A1) 申请公布日期 2013.10.31
申请号 US201313842876 申请日期 2013.03.15
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 KAMATA YOSHIHIKO
分类号 G11C16/26 主分类号 G11C16/26
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