发明名称 |
METHOD OF FABRICATING THREE DIMENSIONAL INTEGRATED CIRCUIT |
摘要 |
PURPOSE: A method for fabricating a three dimensional integrated circuit is provided to improve performance by laminating each wafer die on the uppermost part of a package component. CONSTITUTION: An integrated circuit die (102) is laminated on a package component. A redistribution layer (124) is formed on the first side surface of the packaging component. A holding chamber is formed in the redistribution layer. An encapsulation layer (104) is formed on the uppermost part of the packaging component. A micro bump (120) and the redistribution layer are buried in the encapsulation layer. |
申请公布号 |
KR20130118757(A) |
申请公布日期 |
2013.10.30 |
申请号 |
KR20130004110 |
申请日期 |
2013.01.14 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. |
发明人 |
YEE KUO CHUNG;YU CHUN HUI |
分类号 |
H01L23/48 |
主分类号 |
H01L23/48 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|