发明名称 Reducing peak current in memory systems
摘要 A memory device includes a plurality of memory cells, a token input interface, a token output interface and control circuitry. The control circuitry is configured to accept a storage command, to condition execution of at least a part of the storage command on a presence of a token pulse on the token input interface, to execute the storage command, including the conditioned part, in the memory cells upon reception of the token pulse on the token input interface, and to reproduce the token pulse on the token output interface upon completion of the execution.
申请公布号 US8572423(B1) 申请公布日期 2013.10.29
申请号 US201113021754 申请日期 2011.02.06
申请人 ISACHAR ORI;VLAIKO JULIAN;SEMO GIL;LEVY ATAI;APPLE INC. 发明人 ISACHAR ORI;VLAIKO JULIAN;SEMO GIL;LEVY ATAI
分类号 G06F1/00 主分类号 G06F1/00
代理机构 代理人
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