发明名称 TIMING ANALYSIS PROGRAM, TIMING ANALYSIS APPARATUS, AND TIMING ANALYSIS METHOD
摘要 PROBLEM TO BE SOLVED: To solve the problem in which, in a conventional timing analysis method, timing cannot be analyzed in consideration of a relative variation between a plurality of circuit cells in which different delay values are set.SOLUTION: A timing analysis program executes analysis condition generation processing for generating a first analysis condition in which a variation width of a first delay value of a first circuit cell is shifted on the basis of a first variation coefficient, and a second analysis condition in which a variation width of a second delay value of a second circuit cell is shifted on the basis of a second variation coefficient.
申请公布号 JP2013222248(A) 申请公布日期 2013.10.28
申请号 JP20120091808 申请日期 2012.04.13
申请人 RENESAS ELECTRONICS CORP 发明人 ODA YASUHIRO
分类号 G06F17/50;H01L21/82 主分类号 G06F17/50
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