发明名称 DIGITAL COHERENT RECEIVER AND DIGITAL COHERENT RECEIVING METHOD
摘要 PROBLEM TO BE SOLVED: To adaptively control a step size parameter of an adaptive equalizer in a digital signal processor in accordance with a SOP variation speed.SOLUTION: A digital coherent receiver comprises an adaptive equalizer, a SOP variation speed computer, and a step size parameter control processor. The adaptive equalizer compensates for waveform distortion of a digital signal s0 under adaptive equalization control. In the SOP variation speed computer, a stokes parameter representing a state of polarization SOP of the digital signal s0 is computed from a tap coefficient of the adaptive equalizer, and a SOP variation speed ω0 at arbitrary time intervals is computed using the stokes parameter and outputted. In the step size parameter control processor, a step size parameter μ0 which is multiplied in updating the tap coefficient of the adaptive equalizer, is controlled adaptively in accordance with the SOP variation speed ω0 and set to the adaptive equalizer.
申请公布号 JP2013223128(A) 申请公布日期 2013.10.28
申请号 JP20120093987 申请日期 2012.04.17
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 HAMAOKA FUKUTARO;SEKI TSUYOSHI;MATSUDA TOSHIYA;NAGA AKIRA
分类号 H04B10/61;H04B3/04;H04B10/2569 主分类号 H04B10/61
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