发明名称 DEVICE FOR READING FROM MAGNETIC RECORD CARRIER
摘要 A device for reading out from a carrier of magnetic record includes a pulse former between outputs of which connected are series and matched excitation windings of magneto-modulation head, which first and second signal windings are connected in series opposition, first transistor, which drain connected to the first output of the second resistor and source to the second output of the second resistor and to the input of the univibrator, which output is connected to the first diode which cathode through paralleled first capacitor and first resistor is connected to the common bus, and through the third resistor connected to gate of the first transistor. The finish of the second signal winding of the magneto-modulation head is connected to common bus, magneto-modulation head is equipped with the third and fourth signal windings connected in series opposition. Second transistor is used, its drain is connected to the first output of the fifth resistor and the source to the second output of the fifth resistor and to the input of the second univibrator which output is connected to the second diode which cathode through paralleled second capacitor and fourth resistor is connected to common bus, and through the sixth resistor is connected to gate of the second transistor. The cathode of the second diode is connected to the additional output bus, and the finish of the additional fourth signal winding of the magneto-modulation head is connected to the common bus. In the device between the finish of the first signal winding of the magnetic modulation head and the second resistor paralleled seventh resistor and third transistor are placed. The gate of third transistor is connected through the eighth resistor to negative pole of the source of direct voltage, through the ninth resistor to the common bus and through the tenth resistor to the second output bus. Between the start of the third signal winding of the magneto-modulation head and the fifth resistor paralleled eleventh resistor and fourth transistor are placed, gate of the last one is connected through the twelfth resistor to the negative pole of the direct voltage source, through the thirteenth resistor to the common bus and through the fourteenth resistor to the first output bus.
申请公布号 UA84540(U) 申请公布日期 2013.10.25
申请号 UA20130004921U 申请日期 2013.04.17
申请人 EASTERN UKRAINIAN VOLODYMYR DAL NATIONAL UNIVERSITY 发明人 SMYRNYI MYKHAILO FEDOROVYCH
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