<p>The drain voltage terminal (17) of a NMOS FET switch (11) is impressed with a positive DC voltage using a back gate voltage as a reference; therefore, even if the voltage amplitude of a signal amplified by an electrical power amplifier (5) on the drain side of the NMOS FET switch (11) changes over time while the NMOS FET switch (11) is in the OFF state, there is an increase in the threshold voltage (Vth) when the ON state is enabled. Accordingly, high efficiency operation up to large amounts of electrical power can be achieved without the ON state being instantaneously enabled.</p>
申请公布号
WO2013157039(A1)
申请公布日期
2013.10.24
申请号
WO2012JP02665
申请日期
2012.04.18
申请人
MITSUBISHI ELECTRIC CORPORATION;KATO, KATSUYA;NITTA, NAOKO;MUKAI, KENJI;HORIGUCHI, KENICHI;HIEDA, MORISHIGE