| 摘要 |
Embodiments of the present provide an integrated circuit system, which includes an interposer having a plurality of electrical conductive vias running through the interposer, one or more high-power chips mounted on a first surface of the interposer, wherein the one or more high-power chips generate at least 10 W of heat during normal operation, one or more low-power chips mounted on a second surface of the interposer, wherein the one or more low-power chips generate less than 5 W of heat during normal operation, and the first surface and the second surface are opposite and substantially parallel to each other, and an encapsulating material formed over and configured to encapsulate the one or more high-power chips and the one or more low-power chips. Since low-power chips and high-power chips are respectively mounted on front side and back side of the interposer, the footprint of the interposer and manufacturing cost associated therewith is reduced. |
