FAILURE PREDICTING CIRCUIT AND METHOD, AND SEMICONDUCTOR INTEGRATED CIRCUIT

摘要

The present invention provides a synchronous-type semiconductor integrated circuit with high reliability. In the semiconductor integrated circuit, a delay circuit is connected to a data line. The semiconductor integrated circuit includes a first storage circuit 101 and a second storage circuit 102 that respectively store logic levels of an input to the delay circuit and an output of the delay circuit when a logic level of a clock line is changed, and a determination circuit 104 that determines whether or not the results of the first storage circuit 101 and the second storage circuit 102 coincide or not. Even if a transistor or a wiring that constitutes the semiconductor integrated circuit has been degraded due to secular change or the like, a possibility of an anomaly or a failure in one of the operation circuits caused by the degradation can be predicted before the anomaly or the failure occurs.