| 摘要 |
<p>A semiconductor device 102 is protected from over-voltages by means of a series connected comparator-controlled high-current FET 110. The FET 110 couples the semiconductor device 102 to a load 128,129. The FET device 110 is a three-terminal, N-channel field effect transistor (FET) and has its source 112 coupled to the output/input 104 of the semiconductor device 102 to be protected from over voltage. The FET drain is connected to the load 128,129 to be driven by the semiconductor device 102. A transistor (246 figure 2) or other voltage comparator 140 is configured to compare the voltage on the FET drain 116 to a voltage reference Vmax. When the voltage on the FET drain exceeds Vmax, the comparator output 138 will shut down the FET, thereby isolating the semiconductor device, which is connected to the FET source 112 from the overvoltage on the FET drain 116. A zener diode 148 limits the maximum Gate-Source voltage (Vgs) of the FET. In one embodiment the FET 110 and comparator 138 are mounted on a circuit board which has an on board load. In another embodiment (figures 1,2) the load is off board, and a conductor 124, 220 extends between the load and the drain, with at least part of the conductor being routed adjacent to the overvoltage circuit. In this case the overvoltage protection circuit protects the semiconductor form an over voltage occurrence on the conductor.</p> |
