发明名称 |
Shrinkage of contact elements and vias in a semiconductor device by incorporating additional tapering material |
摘要 |
Vertical contact structures, such as contact elements connected to semiconductor-based contact regions in device areas comprising densely-spaced gate electrode structures, are formed for given lithography and patterning capabilities by incorporating at least one additional dielectric layer of superior tapering behavior into the dielectric material system.
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申请公布号 |
US8563426(B2) |
申请公布日期 |
2013.10.22 |
申请号 |
US201113208697 |
申请日期 |
2011.08.12 |
申请人 |
CHUMAKOV DMYTRO;HERTZSCH TINO;GLOBALFOUNDRIES INC. |
发明人 |
CHUMAKOV DMYTRO;HERTZSCH TINO |
分类号 |
H01L21/4763;H01L21/302;H01L21/461 |
主分类号 |
H01L21/4763 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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