| 摘要 |
PURPOSE: A circuit and method for encoding, decoding, and multistage-decoding a concatenated BCH code, an error correcting circuit of a flash memory device using the same, and the flash memory device are provided to improve error correction performance by repetitively decoding an inner code and an outer code until an error is completely corrected. CONSTITUTION: A first stage code unit outputs a first output BCH code or a parity bit by receiving a part or the entire of data inputted to a flash memory core and performing a BCH encoding operation. An interleaving unit receives and interleaves the part or the entire of the data inputted to the flash memory core and outputs the interleaved data. A second stage code unit performs the BCH encoding operation of the BCH code or the data and outputs a second output BCH code or the parity bit. |
