发明名称 Grid Refinement Method
摘要 The present disclosure provides an embodiment of a method, for a lithography process for reducing a critical dimension (CD) by a factor n wherein n<1. The method includes providing a pattern generator having a first pixel size S1 to generate an alternating data grid having a second pixel size S2 that is <S1, wherein the pattern generator includes multiple grid segments configured to offset from each other in a first direction; and scanning the pattern generator in a second direction perpendicular to the first direction during the lithography process such that each subsequent segment of the grid segments is controlled to have a time delay relative to a preceding segment of the grid segments.
申请公布号 US2013273474(A1) 申请公布日期 2013.10.17
申请号 US201213722266 申请日期 2012.12.20
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 WANG WEN-CHUAN;LIN SHY-JAY;LIU PEI-YI;SHIN JAW-JUNG;LIN BURN JENG
分类号 G03F7/20 主分类号 G03F7/20
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