发明名称 Processor and semiconductor device
摘要 A CPU includes an address decoder that controls input of data from a JTAG I/F and output of data to the JTAG I/F, an authentication unit that performs predetermined authentication processing using an entered password and a predetermined key and, if the authentication is successful, output a predetermined authentication signal, and a selector that controls output of data to be outputted to JTAG I/F according to presence or absence of the predetermined authentication signal.
申请公布号 US8561170(B2) 申请公布日期 2013.10.15
申请号 US201113207606 申请日期 2011.08.11
申请人 KATAYAMA ISAO;KABUSHIKI KAISHA TOSHIBA 发明人 KATAYAMA ISAO
分类号 H04L29/06 主分类号 H04L29/06
代理机构 代理人
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