发明名称 Test functionality integrity verification for integrated circuit design
摘要 Systems and methods are provided for verifying the integrity of test functionality for an integrated circuit design. This may be achieved, for example, by analyzing the integrated circuit design to identify a driver element that outputs a security signal for controlling the test functionality, analyzing the integrated circuit design to identify an input stage of one or more elements that feed the driver element, monitoring the security signal over a range of values for the input stage, and determining that an error exists in the test functionality if a change in the security signal is detected during the monitoring.
申请公布号 US8560987(B2) 申请公布日期 2013.10.15
申请号 US201213484222 申请日期 2012.05.30
申请人 MILLENDORF STEVEN M.;QUALCOMM INCORPORATED 发明人 MILLENDORF STEVEN M.
分类号 G06F17/50 主分类号 G06F17/50
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