| 摘要 |
The Present invention provides a correlator including, a read-out processing circuit that reads out an OFDM signal in RAM as 2n-1 number of delay OFDM signals that are increased and delayed sequentially with their adjusted read-out timings. Complex conjugate circuits that outputs complex conjugates of the inputted nth to 2n-1th delay OFDM signals. Complex arithmetic circuits that perform complex multiplication to inputted original OFDM signal, the first to n-1th delay OFDM signals, and the output signals from the complex conjugate circuits. Moving average processing circuits take the moving average of the GI length, gain adjustment circuits adjust the gains, an adder circuit adds the outputs of the adjustment circuits, and a filter circuit smoothes the addition result. A control circuit variably controls the delay of the delay OFDM signals, the gains of the gain adjustment circuits, and the band characteristic of the filter circuit.
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