发明名称 |
APPARATUSES AND METHODS FOR IMPROVED MEMORY OPERATION TIMES |
摘要 |
Apparatuses and methods for improved memory cycle times are disclosed. An example apparatus may include first and second lines and a sense amplifier. The sense amplifier is directly coupled to the first and second lines. The sense amplifier may sense a differential signal between the first and second lines and amplify the same. An example method may include accessing a first memory cell coupled to a first line of a pair of lines and accessing a second memory cell coupled to a second line of the pair of lines. A differential is sensed between the pair of lines with a sense amplifier coupled directly to the pair of lines, and the sensed differential is amplified. The sense amplifier is coupled to an input/output bus to provide the amplified sensed differential to the input/output bus.
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申请公布号 |
US2013265834(A1) |
申请公布日期 |
2013.10.10 |
申请号 |
US201213443661 |
申请日期 |
2012.04.10 |
申请人 |
VANKAYALA VIJAYAKRISHNA J.;HOWE GARY;WINEGARD JOHN;SURLEKAR VIPUL;MICRON TECHNOLOGY, INC. |
发明人 |
VANKAYALA VIJAYAKRISHNA J.;HOWE GARY;WINEGARD JOHN;SURLEKAR VIPUL |
分类号 |
G11C7/06;G11C7/12 |
主分类号 |
G11C7/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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