发明名称 |
IMPLEMENTING VOLTAGE FEEDBACK GATE PROTECTION FOR CMOS OUTPUT DRIVERS |
摘要 |
A method and circuit for implementing protection for complementary metal oxide semiconductor (CMOS) output drivers, and a design structure on which the subject circuit resides are provided. An output driver stage transistor stack includes a plurality of series connected PFETs series connected with a plurality of series connected NFETs connected between upper and lower voltage supply rails. A pair of offset DC voltage levels provides respective gate voltages of an intermediate PFET and an intermediate NFET in the output driver stage transistor stack. A pair of pre-driver circuits receiving voltage level translated logic signals drive respective gate inputs of the upper PFET and the lower NFET in the output driver stage transistor stack. A voltage feedback circuit provides respective gate voltages of the PFET and NFET connected together in the output driver stage transistor stack.
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申请公布号 |
US2013265085(A1) |
申请公布日期 |
2013.10.10 |
申请号 |
US201213443209 |
申请日期 |
2012.04.10 |
申请人 |
KERR MICHAEL K.;LAWSON WILLIAM F.;INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
KERR MICHAEL K.;LAWSON WILLIAM F. |
分类号 |
H03K17/56;G06F17/50 |
主分类号 |
H03K17/56 |
代理机构 |
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