| 发明名称 |
SOFT ERROR RESILIENT FPGA |
| 摘要 |
A field programmable gate array (FPGA) includes configuration RAM (CRAM) including at least one non-hardened portion and at least one hardened portion having an SER resilience greater than an SER resilience of the non-hardened portion.
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| 申请公布号 |
US2013265080(A1) |
申请公布日期 |
2013.10.10 |
| 申请号 |
US201313800716 |
申请日期 |
2013.03.13 |
| 申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
ALVES LUIZ C.;CLARKE WILLIAM J.;MULLER K. PAUL;TREMAINE ROBERT B. |
| 分类号 |
H03K19/003 |
主分类号 |
H03K19/003 |
| 代理机构 |
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