发明名称 MEMORY SYSTEM, METHOD OF CONTROLLING THE SAME, AND INFORMATION PROCESSOR
摘要 PROBLEM TO BE SOLVED: To provide a memory system that facilitates cost reduction, a method of controlling the same, and an information processor that uses the same.SOLUTION: A memory system comprises: a plurality of memory chips 18-1 and 18-2 which are arranged by lamination and electrically connected with each other by buses 20 (including an address bus, a data bus, and a control bus) that extend in a laminated direction while penetrating each chip; and a memory controller 16 that is connected to a plurality of processors 12a and 14a and is also connected to the bus 20, and to which a chip select signal line 22 for outputting a chip select signal to each of the memory chips 18-1 and 18-2 is connected. The memory controller 16 converts an address signal, which is output from each of the processors 12a and 14a, into a combination of the chip select signal and an address signal that is to be output to the bus 20, so as to relay data input/output between each of the processors 12a and 14a and each of the memory chips 18-1 and 18-2.
申请公布号 JP2013210985(A) 申请公布日期 2013.10.10
申请号 JP20120082524 申请日期 2012.03.30
申请人 SONY COMPUTER ENTERTAINMENT INC 发明人 TAKASHIMA SHINJI
分类号 G06F13/16;G06F12/06 主分类号 G06F13/16
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