发明名称
摘要 A variable modulus sigma delta (SigmaDelta) modulator for a fractional-N frequency synthesizer in accordance with the present invention may include an integer division unit; a pulse-width modulation (PWM) generator, a SigmaDelta noise-shaping unit, a first input FRAC for receiving a first programmable integer, and a second input MOD for receiving a second input, wherein the integer division unit is configured to perform a translation from the first input and the second input into a first output FRAC' and a second output R, the PWM generator is configured to receive the second input MOD and the second output R, and generate a modulated pulse signal, and the SigmaDelta noise-shaping unit is configured to receive the first output and the modulated pulse signal, and generate a sequence whose average equals approximately the first input over the second input.
申请公布号 JP2013538468(A) 申请公布日期 2013.10.10
申请号 JP20130504604 申请日期 2012.05.31
申请人 发明人
分类号 H03M3/02;H03K7/08 主分类号 H03M3/02
代理机构 代理人
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