发明名称 CLOCK GENERATOR
摘要 PURPOSE: A clock generation circuit is provided to guarantee a stable circuit operation. CONSTITUTION: A clock generation circuit comprises a noise detection unit (210) and a clock generation unit (220). The noise detection unit generates a noise detection signal by detecting noise included in a set of input information. An internal clock generation unit generates an internal clock signal which corresponds to the input signal and adjusts a bandwidth in response to the noise detection signal. The input information includes a power voltage or a clock signal inputted to the internal clock generation unit. [Reference numerals] (210) Noise detection unit; (220) Clock generation unit
申请公布号 KR20130110989(A) 申请公布日期 2013.10.10
申请号 KR20120033393 申请日期 2012.03.30
申请人 SK HYNIX INC.;KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION 发明人 LEE, HYUN WOO;KIM, CHUL WOO;SONG, JUN YOUNG
分类号 H03L7/107;G11C11/407;H03L7/081 主分类号 H03L7/107
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