发明名称 APPARATUS FOR HIGH SPEED ROM CELLS
摘要 <p>PURPOSE: An apparatus for a high speed read only memory cell is provided to reduce coupling capacitance by forming a bit line on a first interconnect layer. CONSTITUTION: A first level contact (504) of a first part is formed on the first active region of a transistor. A second first level contact (506) of a second part is connected to a first VSS line. A second VSS line is electrically connected to the first VSS line. A first bit line is formed on a first interconnect layer. A second bit line is parallel to the second VSS line.</p>
申请公布号 KR20130111144(A) 申请公布日期 2013.10.10
申请号 KR20120059649 申请日期 2012.06.04
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 发明人 LIAW JHON JHY
分类号 H01L27/112;H01L21/8246 主分类号 H01L27/112
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