SRAM having separate storage cells and read-write circuit

摘要

Static random access memory (SRAM) device having a plurality of storage cells (data cells, figures 2,3) and a separate read-write circuit (figure 3). In an embodiment of the invention each of the plurality of storage cells is connected to a read-write data node of the read-write circuit by a dedicated connection, and an access switch controlled by a word line controlled signal (figures 4-6 and 9) which permits read-write access to the storage cell. Preferably the dedicated connection exhibits a greater capacitance than the read-write data node of the read/write circuit, such that the primary read mechanism of the SRAM is charge equalisation. The SRAM device also includes a write data connection and means for connecting the write data connection to the read-write node of the read-write circuit, to permit data to be written to the plurality of storage cells. Write assist techniques are disclosed which assist writing of a '1' to the plurality of storage cells. A voltage recovery and/or pre-charge circuit may also be associated with the read-write node to increase the voltage during a read operation, whilst the voltage across the storage cells may be lowered by means of MOS transistor followers placed in series with the supply or ground connections. The access device(s) may be NMOS transistors or NMOS/PMOS full transmission gates to reduce voltage losses.