发明名称 Data Transferring Circuit with improving Transferring Speed
摘要 PURPOSE: A data transmission circuit for improving output speed improves the output speed of data by reducing the transmission time of the whole data. CONSTITUTION: A data readout circuit includes first to n^th data lines (DL1-DLn) arranged in sequence, where n is a natural number of 2 or more, a readout line (LOUT), and a switching unit (210). The switching unit is driven to transmit first to n^th data sensed through the first to n^th data lines to the readout line in sequence. First to n^th normal switches are driven to switch the first to n^th data lines to the readout line in response to first to n^th normal switching signals. An initial signal is driven to switch the first data line to the readout line in response to an initial switching signal.
申请公布号 KR101315866(B1) 申请公布日期 2013.10.08
申请号 KR20120027672 申请日期 2012.03.19
申请人 发明人
分类号 G11C7/10;G11C7/22 主分类号 G11C7/10
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