The semiconductor device includes: a first conductive-type first well and a second conductive-type second well configured over a substrate to contact each other; a second conductive-type anti-diffusion region configured in an interface where the first conductive-type first well contacts the second conductive-type second well over the substrate; and a gate electrode configured to simultaneously cross the first conductive-type first well, the second conductive-type anti-diffusion region, and the second conductive-type second well over the substrate.
申请公布号
US8552497(B2)
申请公布日期
2013.10.08
申请号
US201113290535
申请日期
2011.11.07
申请人
CHA JAE-HAN;LEE KYUNG-HO;KIM SUN-GOO;CHOI HYUNG-SUK;KIM JU-HO;CHAE JIN-YOUNG;OH IN-TAEK;MAGNACHIP SEMICONDUCTOR, LTD.
发明人
CHA JAE-HAN;LEE KYUNG-HO;KIM SUN-GOO;CHOI HYUNG-SUK;KIM JU-HO;CHAE JIN-YOUNG;OH IN-TAEK