发明名称 INFORMATION PROCESSOR AND CONTROL METHOD FOR INFORMATION PROCESSOR
摘要 PROBLEM TO BE SOLVED: To reduce a communication volume in replacement processing between arithmetic processors.SOLUTION: An SB3 comprises a CPU 20a, a CPU 20b connected to a memory 10b and a CPU 20c. The CPU 20a includes: a cache memory for holding data; and a determination part for, when replacement processing of replacing data occurs, determining whether or not to write the data back to the memory 10b, on the basis of state information showing a state of the data. The CPU 20a issues a replacement request for replacing the data, in the form of including the data, on the basis of a result of the determination. The CPU 20b, when a data readout request from the CPU 20c is not under execution at the time of receiving the replacement request, sends the CPU 20a a completion notice to the effect that the data is written back to the memory 10b and the replacement processing is completed. The CPU 20b, when the readout request is under execution at the time of receiving the replacement request, sends the completion notice to the CPU 20a after finishing the readout request.
申请公布号 JP2013205985(A) 申请公布日期 2013.10.07
申请号 JP20120072397 申请日期 2012.03.27
申请人 FUJITSU LTD 发明人 SUGIZAKI TAKESHI;ISHIMURA NAOYA
分类号 G06F12/08 主分类号 G06F12/08
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