发明名称 VIDEO DISPLAY PROCESSOR AND VIDEO DISPLAY PROCESSING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a technology for suppressing the increase of the quantity of GDC(Graphics Display Controller) and ASIC(Application Specific Integrated Circuit) included in a video processing path, and for securing the synchronization of video data to be displayed and output on each display.SOLUTION: A video display processor includes: first processing means having means for generating the image frames of a plurality of videos to be output to a plurality of displays, compression means for compressing each of the image frames of the plurality of videos by a predetermined compression ratio, and means for outputting each of the compressed image frames to second processing means as a synthetic image frame; and second processing means having means for acquiring each of the compressed image frames from the synthetic image frame, means for extending each of the compressed image frames into a plurality of image frames before compression by a compression ratio; and means for outputting each of the plurality of image frames before compression to the corresponding display.
申请公布号 JP2013205738(A) 申请公布日期 2013.10.07
申请号 JP20120076676 申请日期 2012.03.29
申请人 FUJITSU TEN LTD 发明人 MATSUMOTO TAKEO;KAMIBAYASHI TERUHIKO;ONISHI YASUSHI;YAMAMOTO DAISUKE;FUJIMOTO TOMOYUKI
分类号 G09G5/00;G09G5/36;G09G5/377;H04N7/26 主分类号 G09G5/00
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