发明名称 DATA PROCESSOR AND CONTROL METHOD FOR DATA PROCESSOR
摘要 PROBLEM TO BE SOLVED: To suppress delay relating to the arbitration of the output ports of a data processor for simultaneously outputting the data of a plurality of entries.SOLUTION: The data processor includes a plurality of entries and a plurality of output ports, and when a clock is input, the plurality of entries are allocated to a plurality of arbitration groups corresponding to the plurality of output ports, and when data stored in the entries are output from the output ports, the arbitration of the output ports is performed by the allocated arbitration group units, and the data stored in the entries are output in accordance with the arbitration result.
申请公布号 JP2013206095(A) 申请公布日期 2013.10.07
申请号 JP20120073990 申请日期 2012.03.28
申请人 FUJITSU LTD 发明人 ITO TOSHIRO;AKIZUKI YASUNOBU
分类号 G06F9/38 主分类号 G06F9/38
代理机构 代理人
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