| 摘要 |
A method for providing a timestamp in a real-time system, whereby the real-time system has an FPGA and a CPU, which cooperate with one another, and at least one register, which contains a system time, is implemented in the FPGA. The method includes the steps of providing a CPU counter for the system time, which is driven by a clock signal of the CPU, providing a synchronization counter in the CPU, whereby the synchronization counter is driven by a clock signal of the CPU, reading of the counter for providing the system time by a real-time application, querying the synchronization counter in the real-time application, and synchronizing the counter with the system time in the real-time application, when the synchronization counter outputs a value that corresponds to more than a predefined time period since the last synchronization of the CPU counter with the system time.
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