发明名称 STRESS REDUCTION MEANS FOR WARP CONTROL OF SUBSTRATES THROUGH CLAMPING
摘要 A method is provided for bonding a semiconductor chip to a packaging substrate while minimizing the variation in the solder ball heights and controlling the stress in the solder balls and the stress in the packaging substrate. During the solder reflow, the warp of the packaging substrate, including the absolute warp, thermal warp, and substrate to substrate variations of the warp, is constrained at a minimal level by providing a clamping constraint to the packaging substrate. During cool down of the solder balls, the stresses and strains of the solder joints are maintained at levels that do not cause tear of the solder joints or breakage of the packaging substrate by removing the clamping constraint. Thus, the bonding process provides both uniform solder height with minimized solder non-wets and stress minimization of the solder balls and the packaging substrate.
申请公布号 US2013260534(A1) 申请公布日期 2013.10.03
申请号 US201213437309 申请日期 2012.04.02
申请人 KHANNA VIJAYESHWAR D.;SRI-JAYANTHA SRI M.;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 KHANNA VIJAYESHWAR D.;SRI-JAYANTHA SRI M.
分类号 H01L21/30;B23K37/04 主分类号 H01L21/30
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