发明名称
摘要 A method for manufacturing a silicon-on-insulator structure including a substrate wafer, an active wafer, and an oxide layer between the substrate wafer and the active wafer. The method includes the steps of heat treating the structure, trapezoid grinding edges of the wafer, and grinding a surface of the wafer.
申请公布号 JP2013537711(A) 申请公布日期 2013.10.03
申请号 JP20130521269 申请日期 2011.07.22
申请人 发明人
分类号 H01L21/02;H01L21/304;H01L27/12 主分类号 H01L21/02
代理机构 代理人
主权项
地址