发明名称 METHOD AND APPARATUS TO PROCESS SHA-2 SECURE HASHING ALGORITHM
摘要 A processor includes an instruction decoder to receive a first instruction to process a secure hash algorithm 2 (SHA-2) hash algorithm, the first instruction having a first operand associated with a first storage location to store a SHA-2 state and a second operand associated with a second storage location to store a plurality of messages and round constants. The processor further includes an execution unit coupled to the instruction decoder to perform one or more iterations of the SHA-2 hash algorithm on the SHA-2 state specified by the first operand and the plurality of messages and round constants specified by the second operand, in response to the first instruction.
申请公布号 WO2013147877(A1) 申请公布日期 2013.10.03
申请号 WO2012US31632 申请日期 2012.03.30
申请人 INTEL CORPORATION;YAP, KIRK S.;WOLRICH, GILBERT M.;GUILFORD, JAMES D.;GOPAL, VINODH;OZTURK, ERDINC;GULLEY, SEAN M.;FEGHALI, WAJDI K.;DIXON, MARTIN G. 发明人 YAP, KIRK S.;WOLRICH, GILBERT M.;GUILFORD, JAMES D.;GOPAL, VINODH;OZTURK, ERDINC;GULLEY, SEAN M.;FEGHALI, WAJDI K.;DIXON, MARTIN G.
分类号 H04L9/28 主分类号 H04L9/28
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