PASSIVE DEVICES FOR FINFET INTEGRATED CIRCUIT TECHNOLOGIES

摘要

Device structures, design structures, and fabrication methods for passive devices that may be used as electrostatic discharge protection devices in fin-type field-effect transistor integrated circuit technologies. A device structure is formed that includes a well (12) of a first conductivity type in a device region (22) and a doped region (52) of a second conductivity in the well. The device region is comprised of a portion of a device layer (14) of a semiconductor-on-insulator substrate (10). The doped region and a first portion of the well (57) define a junction (65). A second portion of the well (61) is positioned between the doped region (62) and an exterior sidewall (23) of the device region. Another portion of the device layer may be patterned to form fins for fin-type field-effect transistors.